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Petascale computing and beyond

National Science Board Approves Funds For Petascale Computing Systems
Today [Aug. 14, 2007] the National Science Board (NSB) approved a resolution authorizing the National Science Foundation (NSF) to fund the acquisition and deployment of the world's most powerful "leadership-class" supercomputer, proposed in response to NSF's "Track 1" supercomputing solicitation. This "petascale" system is expected to be able to make arithmetic calculations at a sustained rate in excess of a sizzling 1,000-trillion operations per second (a "petaflop" per second) to help investigators solve some of the world's most challenging science and engineering research problems.

This would be a significant milestone – "petascale" supercomputers that can process 1000 trillion floating point operations per second.

But there's something puzzling about this announcement. A little further on it describes the "Track 1" system:
In the first award, the University of Illinois at Urbana-Champaign (UIUC) will receive $208 million over 4.5 years to acquire and make available a petascale computer it calls "Blue Waters," which is 500 times more powerful than today's typical supercomputers. The system is expected to go online in 2011.

This system is described as being 500 times as powerful as a "typical" supercomputer today. It's not clear what is being assumed as "typical", but according to the Wikipedia article, as of August 2007 the fastest supercomputer currently installed and operational is an IBM Blue Gene/L at Lawrence Livermore National Laboratory, which is rated at 280 teraflops, or .28 petaflop. Of course, that's not a "typical" supercomputer, but one wonders exactly what is expected for this proposed "Track 1" system.

However, it appears that an actual petaflop supercomputer will be available this year, not 2011, if IBM meets the objectives with "Blue Gene/P" described here:

IBM Triples Performance of World's Fastest, Most Energy-Efficient Supercomputer
ARMONK, NY - 26 Jun 2007: IBM (NYSE: IBM) today announced Blue Gene/P, the second generation of the world's most powerful supercomputer. Blue Gene/P nearly triples the performance of its predecessor, Blue Gene/L -- currently the world's fastest computer. ...

The IBM® System Blue Gene®/P Solution scales to operate continuously at speeds exceeding one "petaflop" -- or one-quadrillion operations per second. ...

The U.S. Dept. of Energy's Argonne National Laboratory, Argonne, Ill., will deploy the first Blue Gene/P supercomputer in the U.S. beginning later this year. In Germany, the Max Planck Society and Forschungszentrum Julich also plan to begin installing Blue Gene/P systems in late 2007.

If the schedule and performance objectives are met, then the petascale threshold will be crossed little more than 10 years after the terascale threshold was crossed in 1997 – by ASCI Red. So there would be a factor of 1000 top speed growth in a little over 10 years – which represents nearly a doubling of top speed every year.

It will be interesting to observe whether this keeps up. That would mean we could see exascale computing (an exaflop, which is one million teraflops) in 2017. This will depend to a large extent on whether Moore's Law holds up 10 more years, and that's not by any means a done deal.

Between 1997 and 2007, smallest silicon integrated circuit feature sizes decreased from about 500nm to 45nm, so a 100-fold improvement in areal density was achieved together with 1000-fold improvement in top computer speed. The 100-fold increase in circuit density translates to a similar increase in speed, assuming that results from being able to fit 100 times as many instruction processors in roughly the same size package. The additional factor of 10 in performance presumably results from some combination of faster processor "clock speed", internal parallelism, and larger total system size.

Somehow I don't see general purpose quantum computers available within 10 years, yet some technology beyond current silicon chips will most likely be needed to keep speed doubling going until 2017. State of the art feature sizes this year are at 45nm. Even a 10-fold improvement to 4.5nm – which may not be feasible – would yield only 100-fold improvement in number of circuits per unit area. As in the previous decade, additional performance improvements will be required to add a further factor of 10 in total performance. What techniques might allow this? For example, will it be possible to fabricate practicable 3D multilayer devices by 2017?

Here are just some of the engineering challenges that must be overcome in order to push feature sizes towards 5nm with anything like current silicon chip designs:

  • Preventing current leakage between adjacent features
  • Dissipation of heat from more densely packed circuit elements
  • Development of new fabrication technologies if current lithographic techniques don't scale down as far as necessary
  • Testing and error detection in nanoscale circuits, and achieving acceptable manufacturing "yield"

Perhaps exascale computing power will be within reach by 2017. But it won't be easy. To be accomplished with anything like current silicon technology assumes that trends of the past 10 years continue in both decreasing feature size and the ability to squeeze another factor of 10 in speed from additional parallelism, clock speed, or other means.

Or perhaps it will be necessary to successfully implement radical new technologies, such as circuits fabricated with carbon nanotubes.

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